| 09.00 |
Registration |
| 09.50 |
Chairman’s welcome |
| 10.00 |
Productivity in FPGA Design
Mark Dickinson, Vice President, European Technology Centre, Altera
- Setting the scene: an overview of the state-of-the art in FPGA devices
- An analysis of the implications of these advances for FPGA developers
- A discussion of present and future design techniques illustrated with examples taken from common applications such as image processing and packet processing
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| 11.00 |
Refreshments |
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| Session 1: Design and Tools |
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| 11.30 |
High Performance FPGA Design Techniques
Mayur Kumar, European FPGA Product Specialist, Mentor Graphics
- In this presentation we will discuss design techniques that can be used to achieve high performance FPGA designs
- These guidelines include architecture and micro-architecture selection, RTL coding styles and physical optimizations
- We will also highlight advanced optimizations that can be performed by synthesis tools, allowing designers to write more effective RTL code
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| 12.00 |
Run-Time Reconfigurable Automobile Systems: Adaptive Architectures and Toolchain
Michael Hübner, Associate Professor, ITIV Universität Karlsruhe (TH)
- Novel approaches, based on reconfigurable hardware could be a solution to handle the computation intensive tasks, e.g. for diver-assistance systems
- Optimal trade-off between power consumption, performance and flexibility
- Run Time Reconfiguration using Fine Grained reconfigurable hardware with filigree adaptation mechanisms
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| 12.30 |
Programming Models for Reconfigurable Systems
Satnam Singh, Researcher, Microsoft Research Cambridge
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| 13.00 |
Lunch |
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| Session 2: Prototyping and Applications |
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| 14.00 |
Back to the Future: Latest Developments for ASIC Prototyping in FPGA
Doug Amos, Director of European Business Development, Synplicity
- From early days, FPGAs have been used as prototyping platforms. Recent developments are transforming this popular application
- FPGA Prototyping delivers clear speed advantages over emulation and simulation but difficult set-up and debug has limited its use
- Pre-assembled FPGA Hardware combined with latest partitioning, synthesis and debug technology remove these limitations
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| 14.30 |
Unleashing the Potential of FPGAs on Real-World ApplicationsUnleashing the Potential of FPGAs on Real-World Applications
Edouard Vincent, Director of Consulting, Celoxica
- Introduction about compiling software to FPGA : why is Celoxica technology essential as we move toward high performance computing on FPGAs?
- Real-world Application : going through case studies in the fields of Financial Computing, Oil and Gas exploration and Life sciences
- The future of FPGA in HPC : closer FPGA-CPU interaction and the need for high-level programming semantics. Introduction about HyperStreams++
|
| 15.00 |
Refreshments |
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| Session 3: Security |
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| 15.30 |
What’s in that Chip? : Identifying Design Intellectual Property within a Configured FPGA
Tom Kean, Director, Algotronix Ltd
- Markings on FPGA Chip packages identify the FPGA not the design within resulting in a design identification and version control problem
- A small, low power tag circuit added to the user design configured into the FPGA can be detected using an external scanner through the package without electrical contact
- This technique works for both FPGAs and ASICs (including antifuse FPGAs and FPGAs with encrypted bitstreams) and can be used to detect pirated designs and unlicensed use of IP cores and CAD tools.
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| 16.00 |
Opportunities and Threats in the Design of Secure Systems
Max Childs, European Marketing Manager, Actel |
| 16.30 |
Panel Discussion |
| 17.00 |
Chairman’s Comments |
| 17.30 |
Networking Reception and Exhibition |
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